In a manufacturing process of a semiconductor device or a flat panel such as a liquid crystal display, patterns of desired microstructures (for example, holes or trenches) are formed on a substrate such as a semiconductor wafer or an FPD substrate by performing, e.g., a film forming process, an etching process, and the like on the substrate. Semiconductor devices tend to be getting further integrated year by year. Accordingly, to respond to the micronization of the patterns formed on the substrate, improvement in a resist material or an exposure technique has been sought for and an opening dimension of a resist pattern has been getting smaller.
With the progress in such micronization, when an etching target film on the substrate is etched by using a resist pattern as a mask, there arise problems of an over-enlargement in an opening dimension of the resist pattern or an over-etching of a sidewall of a recess in the etching target film. These result in a deviation of a critical dimension (CD) of a hole or a trench from a target value, such that device characteristics as designed may not be obtained.
To address this problem, there have been recently developed various techniques for forming a pattern having the opening dimension smaller than one of the resist pattern in the etching target film or preventing the critical dimension of the pattern formed on the etching target film from deviating from the target value by etching. The etching is conducted, for example, after the opening dimension of the resist pattern is made smaller by performing a deposition process for accumulating a deposit on the resist pattern for a certain period of time in advance (see, for example, Patent Documents 1 to 3).
Patent Document 1: Japanese Patent Laid-open Application No. 2007-194284
Patent Document 2: Japanese Patent Laid-open Application No. 2007-273866
Patent Document 3: Japanese Patent Laid-open Application No. 2006-236506
Patent Document 4: Japanese Patent Laid-open Application No. 2001-85388
However, it is known that when a same etching process is performed on substrates, there is a minute difference in critical dimensions of patterns formed after the etching process even if the deposition process is performed for the same period of time. It is deemed that there is generated a deviation in opening dimensions of resist patterns due to a subtle difference in the progress of deposition onto the substrates depending on, for example, conditions within a processing chamber in which the etching is performed.
Further, since such a deviation in critical dimensions is approximately several nanometers (nm) and has been conventionally regarded as falling within a tolerance, it has not caused a significant trouble. However, to comply with the requirement for further micronization of the patterns, such deviation cannot be neglected.
From this point of view, if a film thickness of a deposit accumulated on the substrate can be detected, a termination time of the deposition process can be controlled. Actually, however, it is very difficult to directly monitor the film thickness of the deposit accumulated on the substrate.
In case of an etching process, for example, a variation in a film thickness caused by etching may be directly monitored by way of irradiating light through a monitoring window installed in the processing chamber, detecting reflection light from the substrate through the monitoring window, and analyzing it (see, for example, Patent Document 4).
In case of the deposition process, however, since the deposit is accumulated on an inner sidewall of the processing chamber and/or on an inner side of the monitoring window (i.e., inner side of the processing chamber) as well as on the substrate, reflection light from the substrate cannot be detected accurately due to the presence of such deposit.